1. Technical Field
The present invention relates to a semiconductor memory, and more particularly, to an apparatus and method of detecting a refresh period of a semiconductor memory.
2. Related Art
As shown in FIG. 1, an apparatus for detecting a refresh period of a semiconductor memory according to the related art includes a first NAND gate ND11 that receives a self refresh pulse (hereinafter, referred to as SREF_PULSE) generated according to a self refresh entering command and a test mode signal (hereinafter, referred to as TM_REFOSC), a second NAND gate ND12 that receives a self refresh period signal (hereinafter, referred to as OSC) and the TM_REFOSC, a latch circuit 11 that maintains a voltage level of the output signal of the first NAND gate ND11 according to the output of the second NAND gate ND12 and outputs a refresh period detecting signal (hereinafter, referred to as MEAS_OSC), an inverter IV11 that receives the TM_REFOSC, and a transistor M11 having a drain coupled with an output terminal of the latch circuit 11, a source connected to ground, and a gate receiving the output of the inverter IV11.
The operation of the apparatus for detecting a refresh period of a semiconductor memory according to the related art that has the above-described structure will be described with reference to FIG. 2.
When the TM_REFOSC is enabled and the SREF_PULSE is generated, the voltage level of the MEAS_OSC changes from a low level to a high level.
Then, when a first self refresh period signal OSC is generated, the voltage level of the MEAS_OSC changes from a high level to a low level.
Since a high level interval of the MEAS_OSC signal is a self refresh period to be measured, the MEAS_OSC signal is read from the semiconductor memory test equipment, and a self refresh period test is performed.
The apparatus for detecting a refresh period of a semiconductor memory according to the related art detects a self refresh period using a first output of an oscillator that generates the self refresh period after entering a self refresh mode. However, since the oscillator operates right after entering the self refresh mode, an initial output waveform is unstable and the self refresh period is detected from the unstable waveform, which it is not possible to perform normal period detection with. As a result, the self refresh period may be unstable, which leads to data loss.